part number upc1663gv package outline s08 symbols parameters and conditions units min typ max i cc power supply current ma 13 20 a vd differential voltage gain: gain 1 200 320 500 gain 2 8 10 12 bw bandwidth (gain is 3 db down gain 1 mhz 120 from the gain at 100 khz) gain 2 mhz 700 t r rise time, v out = 1v p-p: gain 1 ns 2.9 gain 2 ns 2.7 t pd propagation delay, v out = 1 vp-p: gain 1 ns 2 gain 2 ns 1.2 r in input impedance: gain 1 k 4.0 gain 2 k 50 180 c in input capacitance pf 2 i io input offset current a 0.4 5.0 i b input bias current a 20 40 v n input noise voltage, 10 k to 10 mhz v r.m.s. 3 v i input voltage range v 1.0 cmrr common mode rejection ratio, vcm = 1 v, f 100 khz db 55 94 vcm = 1 v, f = 5 mhz db 53 60 svrr supply voltage rejection ratio, v = 0.5 v db 50 70 v o(off) output offset voltage, v o(off) = |out1 - out2| gain 1 v 0.3 1.5 gain 2 v 0.1 1.0 v o (cm) output common mode voltage v 2.4 2.9 3.4 v op-p max. output voltage swing, single-ended vp-p 3.0 4.0 i sink output sink current ma 2.5 3.6 notes: 1. gain select pins ga and gb are connected together. 2. all gain select pins are open. 3. insert adjustment resistor (0 to 10 k ) between ga and gb when variable gain is necessary. features dc to vhf differential video amplifier nec's upc1663gv is a video amplifer with differential input and output stages. a high frequency process (f t = 6 ghz) improves ac performance compared with industry-standard video amplifers. this device is excellent as a sense amplifer for high-density ccds, as a video or pulse amplifer in high- resolution displays, and in communications equipment. description ? bandwidth and typical gain: 120 mhz at a vol = 300 170 mhz at a vol = 100 700 mhz at a vol = 10 ? very small phase delay ? gain adjustable from 10 to 300 ? no frequency compensation required electrical characteristics (t a = 25c, v cc = 6 v, r s = 50 , f = 10 mhz) single ended voltage gain vs. frequency 0 10 20 30 40 50 60 100 k 1 m 10 m 100 m gain 1 gain 2 single ended voltage gain, a vs (db) frequency, f (hz) california eastern laboratories upc1663gv
symbols parameters units ratings v cC v e voltage between v c and v e v -0.3 to 14 p t total power dissipation 2 mw 200 v id differential input voltage v 5 v in input voltage v 6 i o output current ma 35 t op operating temperature c -45 to +75 t stg storage temperature c -55 to +150 absolute maximum ratings 1 (t a = 25c) equivalent circuit 75 output voltage (v p-p ) supply voltage, v (v) video line single ended output voltage swing vs. frequency frequency, f (hz) relative gain, a vr 2.0 1.0 0 100 k 1 m 10 m 100 m 1g out 75 ? 75 ? 75 ? 75 ? 200 ? 200 ? 0.1 v c = 6 v, ve = -6 v typical performance under sin - gle supply +5 v operation* parameter conditions typical units differential gain 15 mhz gain 1 35 db gain 2 11 db bandwidth gain is 3 db down from gain 1 the gain at 100 khz 106 mhz gain 2 115 mhz rise time r s = 50 , v out = 80 mv p-p gain 1 2.2 ns propagation delay gain 1 rs = 50 , v out = 80 mvp-p 2.8 ns gain 2 rs = 50 , v out = 60 mvp-p 1.8 ns phase shift 100 mhz gain 1 -123 degree gain 2 -93 degree output power z l = 50 , 15 mhz r a = 240 5.0 dbm r a = 910 0 dbm r a = 80 -11.5 dbm upc1663gv normalized voltage gain vs. supply voltage * see application circuit notes: 1. operation in excess of any one of these parameters may result in permanent damage. 2. mounted on 50 cm x 50 cm x 1.6 mm glass epoxy pcb with copper flm (t a = max t op ). recommended operating conditions (t a = 25c) symbols characteristics units min typ max v c positive supply voltage v +2 +6 +6.5 ve negative supply voltage v -2 -6 -6.5 i o source source current ma 20 i o sink sink current ma 2.5 frequency range mhz dc 200 attention: due to high frequency characteristics, the physical circuit layout is very critical. supply voltage line bypass, double-sided printed-circuit board, and wide-area ground line layout are necessary for stable operation. two signal resistors connected to both inputs and two load resistors connected to both outputs should be balanced for stable operation. typical performance curves (t a = 25c) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.1 +2 +3 +4 +5 +6 +7 +8 v c gain 2 gain 1 -2 -3 -4 -5 -6 -7 -8 v e v c in 1 g a in 2 g b out 1 out 2 ve
typical performance curves (t a = 25c) upc1663gv single ended output voltage swing vs. temperature ambient temperature, t a (c) output voltage, v o (v p-p ) 5.0 4.5 4.0 3.5 3.0 2.5 -20 0 20 40 60 80 ambient temperature, t a (c) output sink current, i osink (ma) sink current vs. temperature input bias current, i b ( a) ambient temperature, t a (c) 50 40 30 20 10 0 -20 0 20 40 60 80 vc =6 v, ve = -6 v input bias current vs. temperature differential voltage gain vs. resistance between g a and g b 1000 100 10 10 100 1 k 10 k differential gain, a vd (v/v) r adj ( ) ambient temperature, t a (c) supply current, i cc (ma) supply current vs. temperature 16 15 14 13 12 11 10 -20 0 20 40 60 80 v c = 6 v, v e = -6 v supply current, i cc (ma) 20 15 10 5 0 +2 +4 +6 +8 v c -2 -4 -6 -8 v e supply current vs. supply voltage supply voltage, v (v) 4.0 2.5 3.5 3.0 -20 0 20 40 60 80
0 -45 -90 -135 -180 100 k 1 m 10 m 100 m gain 2 gain 1 phase shiftvs. frequency phase shift (degree) frequency, f (hz) typical performance curves (t a = 25c) upc1663gv typical applications ? application for +5 v single supply ? photo signal detector since the input impedance of the ic falls when the gain rises, stable operation can be achieved by inserting a fet buffer when necessary as illustrated above. +5v 2.2 1000 1000 v+ +5v 3 k 3 k 2.2 1000 2.2 1000 50? 50? 50? 50? 1000 r a r a 1663 v- vc vc r3 vc + 5 v r1 r5 1 k? r6 1 k? ve - 5 v r2 75? r4 50? c2 c1 1000 pf 1000 pf 50? 50? 2.2 2.2 pin photo diode q1
upc1663gv part number quantity UPC1663GV-E1-A 1000/reel ordering information connection diagram (top view) upc1663gv notes: 1. each lead centerline is located within 0.12 mm (0.005 inch) of its true position at maximum material condition. 2. all dimensions are typical unless otherwise specifed. outline dimensions (units in mm) upc1663gv package outline s08 1 2 3 4 8 7 6 5 in 2 g 1a v cc - out 2 in 1 g 1b v cc + out 1 8 7 6 3.0 max 5 1 2 3 4 n 1.50.1 1.8 max 0.1 0.1 0.3 +0.10 -0.05 0.575 max 0.15 +0.10 -0.05 4.94 0.2 3.20.1 0.870.2 0.5 0.2 0.65 3 +7? -3? detail of lead end 1663 exclusive north american agent for rf, microwave & optoelectronic semiconductors california eastern laboratories ? headquarters ? 4590 patrick henry drive ? santa clara, ca 95054-1817 ? (408) 988-3500 ? telex 34-6393 ? fax (408) 988-0279 24-hour fax-on-demand: 800-390-3232 (u.s. and canada only) ? internet: http://www.cel.com 11/04/2008 data subject to change without notice pin pin in single in single no. name bias bias functions and applications internal equivalent circuit (v) (v) 8 in 1 pin apply input pin 1 in 2 voltage voltage 0 v cc /2 5 out 1 pin apply output pin 4 out 2 voltage voltage 0 v cc /2 6 v cc + 2 to 6.5 -0.3 to +14 plus voltage supply pin. this pin should be connected with bypass capacitor to minimize ac impedance. 3 v cc - gnd minus voltage supply pin. this pin should be connected with bypass capacitor to minimize ac impedance. 7 g 1a gain adjustment pin. 2 g 1b external resistor from 0 to 10 kw can be inserted between pin 2 and 7 to determine gain value. pin description 6 4 5 3 2 1 7 8 internal circuit constants should be refered to ap - plication note. life support applications these nec products are not intended for use in life support devices, appliances, or systems where the malfunction of these prod ucts can reasonably be expected to result in personal injury . the customers of cel using or selling these products for use in such applications do so at their own risk and agree to fully indemnify cel for all damages resulting from such improper use or sale.
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